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THIS DOCUMENT IS EXTRMEMELY OUTDATED!!!
C3 IS NOW A *16-BIT* CPU!!!
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TODO: write better docs

C3 ARCHITECTURE
NOTE: this document sucks

//MEMORY

32kb ..... ROM
32kb ..... RAM

(((
TODO:
32kb ..... ROM
31.75kb .. RAM
0.25kb ... I/O RAM
)))

// MEMORY MAP

[$00-$7F] ROM
switchable banks $00-$FF

[$80-$FF] RAM
switchable banks $00-$FF

(TODO: RAM banks $FE-$FF should be mapped to I/O ram instead.
they can be used by the connected device
while *NOT* selected or in IOWAIT)
(TODO:TODO: banks are annoying! find a way to remove them)

//IO

">" - out; "<" - in

> CLK

> IO_TRIGGER_TICK
> IO_OUT
< IO_IN
< IO_WAIT_TICK

I/O MEMORY:
MEM Pins access the main ram chip, only accessible during IOWAIT.
it's recommended to switch bank to FE/FF before halting, as it's a standard place to store i/o data

> MEM_READY
> MEM_OUT
< MEM_ADDR
< MEM_VAL
< MEM_WRT
< MEM_READ

TODO:
MEM Pins should use separate I/O RAM instead

//IO DEVICES

NONE
SLOT: 0
Slot 0 should always be a stub.
value of IO_OUT gets mirrored to IO_IN

GPU
SLOT: 1

  TODO

KEYBOARD
SLOT: 3

IO_TRIGGER_TICK & IO_OUT = $01
Write last pressed key to IO_IN

IO_TRIGGER_TICK & IO_OUT = $02
Write time since last key
press to IO_IN

IO_TRIGGER_TICK & IO_OUT = $03
Wait for key press, write to IO_IN
Triggers IO_WAIT_TICK
Completely blocks all triggers ticks
Use example:
(waits for key press and writes
 it to register A)
IOSLOT 2
LD A,3
IOWRT
IOTRIG
IOWAIT
IOREAD A

OTHER SLOTS
Slots $08-$FF are not reserved for anyting

// REGISTERS

** 4 8-bit general-purpose registers (A,B,C,D) **
Internal:
2 1-bit flag registers (Zero,Carry;can only be read indirectly)
8-bit Freeze register (for internal use only)
8-bit PC (write-only)
2 8-bit bank registers (write-only)
8-bit MMU value register (can be accesed indirectly)

//INSTRUCTION FORMAT

xhhiiiii
i - instruction
h - register select (high bits)
x - instruction set (0-default,1-extended)

//INSTRS
NOTE: (NONE) ops are treated exactly like NOP
NOTE: most instrs are not implemented yet in
both compiler and cpu

00 - NOP
01 - RST //Jump to 0 and reset Bank registers,A,B,C and D to 0. Does not clear the ram
02 - STOP
03 - BANK RAM,R // Switch RAM bank
04 - BANK ROM,R // Switch ROM bank
05 - LD R,A
06 - LD R,B
07 - LD R,C
08 - LD R,D
09 - LD R,[value]
0A - LD A,[R]
0B - LD [R],A
0C - ADD A,R
0D - SUB A,R
0E - MUL A,R
0F - CMP A,R
10 - JP R //Jump to R
11 - JP Z,R //Jump to R if Zero flag is set
12 - JP NZ,R //Jump to R if Zero flag is not set
*NYI:*
13 - JPBNK ROM,R //Switch ROM bank to A and jump to R
14 - JPBNK RAM,R //Switch RAM bank to A and jump to R
15 - IOWAIT // Halt the cpu and wait for IO_WAIT_TICK (TODO TIMEOUT)(TODO INTERRUPT)
16 - IOTRIG // Trigger IO_TRIGGER_TICK
17 - IOWRT R // Write value of register to IO_OUT
18 - IOREAD R // Store value of input register to R
19 - IOSLOT R // Switch current IO device
1A - (NONE)
1B - (NONE)
1C - (NONE)
1D - (NONE)
1E - (NONE)
1F - (NONE)

// EXTENDED INSTRUCTION SET
TODO

// C3ASM

Instr syntax:
INSTRUCTION ARGUMENT_A,ARGUMENT_B

// C3ASM special

1) #BANK [i],[a]
start writing to bank i at address a
both arguments are optional, next bank will be selected by default

2) REM or // ... or //...
Comment.

3) STR and DB
//store nums
DB 01 02 03
//store string
STR "HELLO WORLD?"