The C3 CPU Architecture
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C3 (CPU3) is a simple 16-bit processor architecture.Registers
- Four (16 bit) general-purpose registers: A, B, C and D
-
Two binary flag registers (Zero and Carry)
Zero register gets set if last alu operation result is 0 Carry gets set if last apu operation cases an overflow - One (16-bit) I/O register: IO_OUT (Write-only)
Memory map
| Start | End | Description |
|---|---|---|
| 0000 | 7FFF | Up to 64kb ROM (R/O) |
| 8000 | FFFF | 64kb Built-in RAM (R/W) |
I/O
C3 can have up to 255 I/O ports.
Connector pins:
TODO: I/O memory access
Connector pins:
| Name | Type | Description |
|---|---|---|
| IO_CLK | Output | Clock |
| IO_TRIG | Output | Can be used to end a pulse to the I/O device (IOTRIG) |
| IO_OUT | Output | Value of the IO_OUT register (IOWRT) |
| IO_IN | Input | Value for the IOREAD instr |
| IO_CPUHLT | Output | 1 if cpu is currently HALTed |
| IO_WAKE | Input | UnHALT the CPU |
| IO_SLEEP | Input | HALT the CPU (Without waiting for instrution to finish) |
Instruction encoding
uuuuuuuusrriiiii
s - Instruction set select
r - Register select
i - Instruction
Instrunction table
| s | i | Instr | Description |
|---|---|---|---|
| 0 | 00 | NOP | Does nothing |
| 0 | 01 | RST | Reset A,B,C,D and PC |
| 0 | 02 | STOP | Stop CPU until Resume button is pressed |
| 0 | 03 | - | - |
| 0 | 04 | SWAP A,r | Spap the values of A and r |
| 0 | 05 | LD r,A | Load value of A into r |
| 0 | 06 | LD r,B | Load value of B into r |
| 0 | 07 | LD r,C | Load value of C into r |
| 0 | 08 | LD r,D | Load value of D into r |
| 0 | 09 | LD r,[PC++] | Load value in the next memory cell into r |
| 0 | 0A | LD A,[r] | Read mem at location r into A |
| 0 | 0B | LD [r],A | Write the value of A to mem at location r |
| 0 | 0C | ADD A,r | Add the value of r to A |
| 0 | 0D | SUB A,r | Subtract the value of r from A |
| 0 | 0E | MUL A,r | Multiply A by r and store the result in A |
| 0 | 0F | CMP A,r | Compare r and A. 0 - (A==r); 1 - (A>r); 2 - (A<r) |
| 0 | 10 | JP r | Jump to r |
| 0 | 11 | JP Z,r | Jump to r if Zero flag is set |
| 0 | 12 | JP NZ,r | Jump to r if Zero flag is not set |
| 0 | 13 | JP C,r | Jump to r if Carry flag is set |
| 0 | 14 | JP NC,r | Jump to r if Carry flag is not set |
| 0 | 15 | IOHALT | Wait for IO_WAKE tick |
| 0 | 16 | IOTRIG | Send a pulse to the I/O device |
| 0 | 17 | IOREAD r | Set r to the value of IO_IN line |
| 0 | 18 | IOWRT r | Write r to the IO_OUT register |
| 0 | 19 | ||
| 0 | 1A | - | - |
| 0 | 1B | - | - |
| 0 | 1C | - | - |
| 0 | 1D | - | - |
| 0 | 1E | - | - |
| 0 | 1F | - | - |
| 1 | 00 | - | - |
| 1 | 00 | NOP | Does nothing |
| 1 | 01 | PUSH r | Push r to stack |
| 1 | 02 | POP r | Pop r from stack |
| 1 | 03 | - | - |
| 1 | 04 | - | - |
| 1 | 05 | - | - |
| 1 | 06 | - | - |
| 1 | 07 | - | - |
| 1 | 08 | - | - |
| 1 | 09 | - | - |
| 1 | 0A | - | - |
| 1 | 0B | - | - |
| 1 | 0C | - | - |
| 1 | 0D | - | - |
| 1 | 0E | - | - |
| 1 | 0F | - | - |
| 1 | 10 | - | - |
| 1 | 11 | - | - |
| 1 | 12 | - | - |
| 1 | 13 | - | - |
| 1 | 14 | - | - |
| 1 | 15 | - | - |
| 1 | 16 | - | - |
| 1 | 17 | - | - |
| 1 | 18 | - | - |
| 1 | 19 | - | - |
| 1 | 1A | - | - |
| 1 | 1B | - | - |
| 1 | 1C | - | - |
| 1 | 1D | - | - |
| 1 | 1E | - | - |
| 1 | 1F | - | - |
TODO: Add instruction lengths
C3 Assembly
TODO